CMOS AND Gate
Description:
CD4073BMS, CD4081BMS and CD4082BMS AND gates provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Features
- High-Voltage Types (20V Rating)
- CD4073BE Triple 3-Input AND Gate
- Medium Speed Operation:
- tPLH, tPHL = 60ns (typ) at VDD = 10V
- 100% Tested for Quiescent Current at 20V
- Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
- Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- Standardized Symmetrical Output Characteristics
- 5V, 10V and 15V Parametric Ratings
- Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
See full feature at datasheet from below:
Download Datasheet
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